Moore’s Law scaling is slowing down and limited improvements in performance, power, area, and cost are available from one process node to the next. As a result, advanced packaging and 3D stacking ...
AMD is leveraging one of its latest families of EPYC server CPUs, code-named Genoa X, in-house to run the electronic design automation (EDA) tools it uses for product development. Based on TSMC's 5-nm ...
Something to look forward to: The memory industry is known for its conservative approach, often favoring incremental improvements over revolutionary changes. But as we look toward the end of the ...
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Intel has unveiled a new packaging innovation for creating 3D chip packages and multiple chip connections ahead of the Semicon West conference in San Francisco this week. The company is detailing its ...
Samsung Electronics has successfully applied 3D stacking technology on a test chip that was made using the 7nm extreme ultraviolet (EUV) chip making process, the company said on Thursday. Dubbed ...