EDN

Startup to demo synthesis of asynchronous logic at DAC

LONDON — Tiempo AS (Grenoble, France) has said it will demonstrate the first synthesis tool for asynchronous logic that operates from standard design languages at the Design Automation Conference, due ...
EDN

Does asynchronous logic design really have a future?

The synchronous vs. asynchronous design debate erupts every now and then, usually when a vocal minority swears by asynchronous design, often claiming that asynchronous design delivers higher ...
Design-Reuse

Asynchronous Logic: large CMOS devices without a clock tree

CMOS is, and will continue to be, the work-horse process technology of the semi-conductor industry. But designers of large devices, of complex SoCs and of devices using multiple IP elements are ...
Embedded

Configuring a PSoC for a DIY oscilliscope/logic analyzer – Part 2

Select between the Combination or Sequential circuit for analysis (Figure 16). Figure 16: Screen to select Combinational or Sequential Circuit Select the number of inputs (max of 3) and number of ...